发明名称 |
DATA COMMUNICATION CIRCUIT OF THE FIELD BUS INTERFACE BOARD |
摘要 |
The data communication circuit supports digital serial communication between interface board of a personal computer and twisted pair cable of field bus. The data communication circuit includes a Manchester encoder/decoder (2) for generating encoder and decoder clock signal according to the control signal transmitted from a CPU and for encoding and decoding I/O data signal, a latch/shift register (3) for converting 8 bit parallel data of a CPU (1) to 1 byte serial data to transmit parallel data to the encoder/decoder (2) and for converting 1 byte serial data comins from the encoder/decoder (2) to 8 bit parallel data, a CRC generator (4) for generating CRC check frame and for checking data transmission error, and a driver/receiver (5) for driving and receiving data between the Manchester encoder/decoder (2) and field bus.
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申请公布号 |
KR930007022(B1) |
申请公布日期 |
1993.07.26 |
申请号 |
KR19900021825 |
申请日期 |
1990.12.26 |
申请人 |
KOREA ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
KIM, HYON - KI;LEE, HYOK - HUI;HWANG, SON - HO;CHAE, YONG - DO |
分类号 |
(IPC1-7):G06F15/46 |
主分类号 |
(IPC1-7):G06F15/46 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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