发明名称 ARITHMETIC PROCESSING APPARATUS AND PROCESSING METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To provide an arithmetic processing apparatus configured to prevent reduction in command processing efficiency, and a processing method of the arithmetic processing apparatus.SOLUTION: A command holding unit 30 which submits registered decoded commands to a command execution unit 80 sequentially from an executable one includes: a first holding unit 40 which includes a plurality of first entries 42 holding the decoded commands; a second holding unit 60 which registers some of the commands held in the first entries 42, including second entries 62 less than the first entries 42; a first selection unit 50 which selects a command registered by the second holding unit 60 from among the command held in the first entries 42, and stores identification information identifying the selected command in the second entries 62; and a second selection unit 70 which sequentially selects executable commands of the commands registered by the second holding unit 60, submits them to the command execution unit 80, and detects dependence between the commands submitted to the command execution unit 80 and the commands registered in the second holding unit 60.SELECTED DRAWING: Figure 1
申请公布号 JP2016224796(A) 申请公布日期 2016.12.28
申请号 JP20150112202 申请日期 2015.06.02
申请人 FUJITSU LTD 发明人 SAKASHITA SOTA;AKIZUKI YASUNOBU
分类号 G06F9/38 主分类号 G06F9/38
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