| 主权项 |
1. A method for resolving haplotype phase, comprising:
receiving allele data describing allele information regarding genotypes for a family comprising at least a mother, a father, and at least two children of the mother and the father, where the genotypes for the family contain single nucleotide variants and storing the allele data on a computer system comprising a processor and a memory; receiving pedigree data for the family describing information regarding a pedigree for the family and storing the pedigree data on a computer system comprising a processor and a memory; determining an inheritance state for the allele information described in the allele data based on identity between single nucleotide variants contained in the genotypes for the family using a Hidden Markov Model having hidden states implemented on a computer system comprising a processor and a memory,
wherein the hidden states comprise inheritance states, a compression fixed error state, and an MIE-rich fixed error state,wherein the inheritance states are maternal identical, paternal identical, identical, and non-identical; receiving transition probability data describing transition probabilities for inheritance states and storing the transition probability data on a computer system comprising a processor and a memory; receiving population linkage disequilibrium data and storing the population disequilibrium data on a computer system comprising a processor and a memory; determining a haplotype phase for at least one member of the family based on the pedigree data for the family, the inheritance state for the information described in the allele data, the transition probability data, and the population linkage disequilibrium data using a computer system comprising a processor and a memory; storing the haplotype phase for at least one member of the family using a computer system comprising a processor and a memory; and providing the stored haplotype phase for at least one member of the family in response to a request using a computer system comprising a processor and a memory. |
