Transaction layer packet formatting

摘要

A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.

主权项

1. An apparatus comprising:
a receiver to receive a transaction layer packet from an input/output (I/O) device, wherein the I/O device comprises an add-in card, the transaction layer packet is to comprise a header, and the header is to comprise:
a first byte of the header,a second byte adjacent to the first byte, wherein the second byte is to include a hint field, and the hint field is to identify a hint in the transaction layer packet; anda no-snoop attribute to be included in another byte of the header subsequent to the first byte; and protocol circuitry to process the transaction layer packet.