发明名称 METHOD AND APPARATUS FOR DETECTING AND CORRECTING ERRORS IN A PARALLEL TO SERIAL CIRCUIT
摘要 A circuit has first portion that receives data at a first rate; a second portion that outputs data at a second rate synchronized to and different from the first rate; a third portion that transfers data from the first portion to the second portion; and a fourth portion that generates an error detected signal in response to a disruption in the synchronism between the first and second rates. A different aspect involves a method that includes: receiving data at a first rate in a first portion; transferring data from the first portion to a second portion; outputting data at a second rate from the second portion, the second rate being synchronized to and different from the first rate; and generating an error detected signal in response to detection of a disruption in the synchronism between the first and second rates.
申请公布号 EP2384544(B1) 申请公布日期 2016.12.28
申请号 EP20100701056 申请日期 2010.01.08
申请人 Xilinx, Inc. 发明人 PATRA, Maden, M.;SASAKI, Paul T.
分类号 H03K5/19;G01R31/317;G01R31/3185;G06F11/07;H03L7/095;H03M9/00 主分类号 H03K5/19
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