Various exemplary embodiments relate to an integrated circuit including: a RF interface; a wired interface connectable to a host; a volatile memory having a first block and a last block configured to store data transferred between the RF interface and the wired interface; and a memory controller configured to detect when the last block of the volatile memory has been written and to indicate that the volatile memory is ready to read. Various exemplary embodiments relate to a method performed by a tag including: determining that data is to be received on the first interface; blocking the second interface; writing data from the first interface to a volatile memory; detecting that the last block of the volatile memory has been written; unblocking the second interface; indicating that data is available for reading; blocking the first interface; and reading data from the volatile memory to the second interface.
