发明名称 |
FAN-OUT POP STACKING PROCESS |
摘要 |
Package on package structures and manners of formation are described. In an embodiment, an array of trenches is formed partially through a fan-out substrate. In an embodiment, a plurality of laterally separate locations thermal interface material is dispensed onto an array of embedded bottom die. In an embodiment a thermal compression tool including an array of cavities corresponding to an array of top packages is brought into contact with the array of top packages and underlying fan-out substrate during PoP joint formation. The fan-out substrate may be secured to a vacuum chuck during several processing operations. |
申请公布号 |
US2016268236(A1) |
申请公布日期 |
2016.09.15 |
申请号 |
US201615164296 |
申请日期 |
2016.05.25 |
申请人 |
Apple Inc. |
发明人 |
Chung Chih-Ming |
分类号 |
H01L25/065;H01L21/78;H01L23/00;H01L25/00 |
主分类号 |
H01L25/065 |
代理机构 |
|
代理人 |
|
主权项 |
1. A method of forming a semiconductor device package comprising:
forming an array of trenches partially through an active side of a fan-out substrate, wherein a second side of the fan-out substrate opposite the active side is supported by a carrier substrate during forming the array of trenches, and the fan-out substrate further comprises:
a plurality of embedded bottom die on the carrier substrate and embedded within a polymer-based molding compound; anda redistribution layer spanning over the polymer-based molding compound and the plurality of embedded bottom die, wherein the redistribution layer includes a plurality of conductive lines that fan-out electrical connections with the plurality of embedded bottom die; removing the carrier substrate; and placing an array of top packages onto the second side the fan-out substrate. |
地址 |
Cupertino CA US |