发明名称 フォールデッドカスコード増幅回路
摘要 A folded cascode amplifier circuit includes: an input stage having a pair of transistors and configured to output a positive phase intermediate signal and an opposite phase intermediate signal; a cascode amplification stage having pairs of transistors connected in multiple stages, to which the positive phase intermediate signal and the opposite phase intermediate signal are supplied, and which is configured to output a positive phase output signal and an opposite phase output signal, which are differential signals; a first capacitor connected between a signal line of the positive phase intermediate signal and a signal line of the opposite phase output signal; and a second capacitor connected between a signal line of the opposite phase intermediate signal and a signal line of the positive phase output signal.
申请公布号 JP6048279(B2) 申请公布日期 2016.12.21
申请号 JP20130069947 申请日期 2013.03.28
申请人 富士通株式会社 发明人 檀上 匠
分类号 H03F1/08;H03F3/45 主分类号 H03F1/08
代理机构 代理人
主权项
地址