EFFICIENT HARDWARE INSTRUCTIONS FOR SINGLE INSTRUCTION MULTIPLE DATA PROCESSORS
摘要
A method and apparatus for efficiently processing data in various formats in a single instruction multiple data ("SIMD") architecture is presented. Specifically, a method to unpack a fixed-width bit values in a bit stream to a fixed width byte stream in a SIMD architecture is presented. A method to unpack variable-length byte packed values in a byte stream in a SIMD architecture is presented. A method to decompress a run length encoded compressed bit-vector in a SIMD architecture is presented. A method to return the offset of each bit set to one in a bit-vector in a SIMD architecture is presented. A method to fetch bits from a bit-vector at specified offsets relative to a base in a SIMD architecture is presented. A method to compare values stored in two SIMD registers is presented.
申请公布号
EP3106979(A1)
申请公布日期
2016.12.21
申请号
EP20160169801
申请日期
2014.03.12
申请人
Oracle International Corporation
发明人
Ganesh, Amit;Chavan, Shasank K.;Marwah, Vineet;Kamp, Jesse;Patthak, Anindya C.;Gleeson, Michael J.;Holloway, Allison L.;Macnicol, Roger