| 摘要 |
The controller LSI is connected to an SPI flash memory having a deep power down mode (DPM), and brings the SPI flash memory to the DPM and then brings itself to low power consumption mode (LPM) that volatilizes data in a RAM. This invention solves the problem that the controller LSI cannot release the peripheral device from the DPM upon returning from the LPM due to the volatilization of the data. The controller LSI includes a CPU, the RAM, and an SPI control unit transmitting an SPI command to the flash memory. The SPI command includes a power down command to bring the flash memory into DPM and a release command to release it from the DPM. Upon returning from the LPM, the controller LSI causes the control unit to transmit a release command to the flash memory irrespective of whether it is in DPM or normal mode. |
