发明名称 スイッチ駆動回路
摘要 A switch driving circuit has: a switch signal generator adapted to generate switch signals to complementarily turn on and off switches connected in parallel between a node to which an input voltage is applied and a node to which a ground voltage is applied; drivers adapted to generate gate signals in response to the switch signals; and a dead time setter adapted to set dead times during which the switches are both kept off. At least one of the drivers includes a slew rate setter adapted to vary the slew rate of the gate signals according to a slew rate setting signal. The dead time setter controls to vary at least one of the dead times according to at least one of the slew rate setting signal and the input voltage.
申请公布号 JP6046988(B2) 申请公布日期 2016.12.21
申请号 JP20120253022 申请日期 2012.11.19
申请人 ローム株式会社 发明人 服部 拓也
分类号 H03K17/16;H02M1/08;H03K17/687 主分类号 H03K17/16
代理机构 代理人
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