Systems and Methods Involving Data Bus Inversion Memory Circuitry, Configuration(s) and/or Operation

摘要

Systems, methods and fabrication processes relating to memory devices involving data bus inversion are disclosed. According to one illustrative implementation, a memory device may comprise a memory core, circuitry that receives a data bus inversion (OBI) bit associated with a data signal as input directly, without transmission through OBI logic associated with an input buffer, and circuitry that stores the OBI bit into the memory core, reads the OBI bit from the memory core, and provides the OBI bit as output. In further implementations, memory devices herein may store and process the OBI bit on an internal data bus as a regular data bit.

主权项

1. A memory device comprising:
a memory core; input circuitry that receives a data bus inversion (DBI) bit associated with a data signal as input directly, without transmission through DBI logic associated with an input buffer; section circuitry that stores the DBI bit into the memory core, reads the DBI bit from the memory core, and provides the DBI bit as output, wherein the memory device stores and processes the DBI bit on an internal data bus as a regular data bit.