| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device design method configured to reduce the number of cells, to reduce cell space.SOLUTION: A computer executes a semiconductor device design method including: replacing a logical cell to function as a capacitance and to be arranged as a cell for logical operation, and a logical cell to be corrected, which can function as a cell for logical operation and is determined based on a result obtained by verifying operation of a semiconductor device manufactured based on layout data including arrangement information of a spare cell to be arranged as a capacitance, with a spare cell; and correcting the layout data so as to arrange the logical cell to be corrected, as a capacitance cell.SELECTED DRAWING: Figure 9 |
