发明名称
摘要 <p>A nonvolatile semiconductor memory device has a special test mode and circuitry for counting its own fail bits. During the test mode, test data is stored in the memory, and also in a special expected data buffer. The test data stored in the memory cells are then compared to that stored in the expected data buffer. Where there is no correspondence, fail bits are detected. The lack of correspondence is registered, counted, and output to a data output buffer block.</p>
申请公布号 JP4064658(B2) 申请公布日期 2008.03.19
申请号 JP20010354569 申请日期 2001.11.20
申请人 发明人
分类号 G11C17/00;G11C29/34;G11C16/02;G11C16/06;G11C29/12;G11C29/40;G11C29/44 主分类号 G11C17/00
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