| 摘要 |
A method for forming a contact of a semiconductor device using a solid phase epitaxy is provided to reduce contact resistance by performing a cell spacer process after a first contact layer is formed to realize a wider contact volume. Plural gate patterns are formed on a semiconductor substrate(21). A first spacer is formed on a sidewall of the gate pattern. A first contact layer(26) is formed to gap-fill a part between the gate patterns. A second spacer is formed on an upper sidewall of the gate pattern exposed by the first contact layer. An interlayer dielectric having a contact hole is formed. The contact hole exposes the first contact layer. A second contact layer(32) is formed to be gap-filled in the contact hole. The first and second contact layers are used by solid phase epitaxy(SPE) process. Each first and second contact layer is one epitaxial layer selected from epitaxial silicon, epitaxial germanium, and epitaxial silicon germanium formed by the solid phase epitaxy process.
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