发明名称 Double-Sided Vertical Semiconductor Device With Thinned Substrate
摘要 A vertical semiconductor device is formed in a semiconductor layer having a first surface, a second surface and background doping. A first doped region, doped to a conductivity type opposite that of the background, is formed at the second surface of the semiconductor layer. A second doped region of the same conductivity type as the background is formed at the second surface of the semiconductor layer, inside the first doped region. A portion of the semiconductor layer is removed at the first surface, exposing a new third surface. A third doped region is formed inside the semiconductor layer at the third surface. Electrical contact is made at least to the second doped region (via the second surface) and the third doped region (via the new third surface). In this way, vertical DMOS, IGBT, bipolar transistors, thyristors, and other types of devices can be fabricated in thinned semiconductor, or SOI layers.
申请公布号 US2016358910(A1) 申请公布日期 2016.12.08
申请号 US201615240009 申请日期 2016.08.18
申请人 QUALCOMM Incorporated 发明人 Stuber Michael Andrew;Molin Stuart
分类号 H01L27/082;H01L29/739;H01L29/78;H01L29/10;H01L29/744 主分类号 H01L27/082
代理机构 代理人
主权项 1. A semiconductor device comprising: a semiconductor layer having a front side and a back side, the semiconductor layer having background doping of a first conductivity type; a first doped region of a second conductivity type on the front side of the semiconductor layer; a second doped region of the first conductivity type, the second doped region being formed within the first doped region; a contact region of the second conductivity type, the contact region being adjacent to the second doped region and formed at the front side of the semiconductor layer; a dielectric layer formed on the front side of the semiconductor layer, the dielectric layer including a gate structure in electrical communication with the first doped region and a first electrical contact in communication with the second doped region and the contact region; an etched region on the back side of the semiconductor layer, the etched region including a third doped region having a larger lateral dimension than a lateral dimension of the first doped region; and a second electrical contact in communication with the third doped region.
地址 San Diego CA US
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