发明名称 向上した低電圧書込み速度ビットセル
摘要 In low power CPUs, the best way to reduce power is to reduce supply voltage. Most low voltage memory arrays use an 8T cell, which has read stability immunity, in order to operate at low voltages. An embodiment of the disclosure determines when a write wordline (WWL) rises. If the determination shows that the WWL has risen, at least one of the plurality of p-channel field effect transistors (pFETS) is disconnected from a voltage supply, and the at least one plurality of n-channel field effect transistors (nFET) passgate transistors are opened.
申请公布号 JP6038956(B2) 申请公布日期 2016.12.07
申请号 JP20140553537 申请日期 2013.01.23
申请人 クアルコム,インコーポレイテッド 发明人 ジョシュア・エル・パケット;マニシュ・ガーグ;ハリッシュ・シャンカー
分类号 G11C11/412;G11C11/413 主分类号 G11C11/412
代理机构 代理人
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