| 摘要 |
PURPOSE: A circuit for multiplexing/inverse multiplexing data is provided to use FIFO(First In First Out) memories, which is possessed in an HDSL(High-bit-rate Digital Subscriber Line) device for stable data transmission. CONSTITUTION: A circuit for multiplexing/inverse multiplexing data comprises: an E1 mapping clock generator(300) for generating a clock to map E1 data; FIFO(First-In First-Out) memories(215) for storing the E1 data in a first, a second memory according to time slots in turn, by a write clock; an HDSL(High-bit-rate Digital Subscriber Line) frame controller(400) for making basic HDSL frames by receiving a signal generated from the E1 mapping clock generator(300), for adjusting synchronization between a data terminal and lines, and for supplying a clock to read the data from the FIFO memories(215); a FIFO data input/output confirmer(500) for latching data recorded in the FIFO memories(215) by the control clock, for comparing two values, and for resetting the FIFO memories(215), if the two values are not the same; and an HDSL framer mapper(600) for transmitting E1/2 data outputted from the first, the second memory of the FIFO memories(215) to the lines, by mapping the E1/2 data in the frames made in an HDSL frame(420).
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