Method and controller for processing data multiplication in RAID system

摘要

The invention discloses a method and controller for processing data multiplication in a RAID system. Map tables are generated for all values in a field, respectively. The length of an XOR operation unit is chosen to be appropriate w bits (e.g., 32 bits or 64 bits). One or several XOR operation units form a multiplication unit of a data sector. When computing on-line, data in a disk drive of a disk array are performed with XOR operations in accordance with one of the map tables using an XOR operation unit as one unit while computing on the multiplication unit to obtain a product of multiplication.;Making use of the RAID system established according to the disclosed method, only XOR operations are required to compute parity data or recover damaged user data. Moreover, several calculations can be performed simultaneously. Therefore, the efficiency of the RAID system can be effectively improved.

主权项

1. A method for accessing data in a physical storage device (PSD) array including a plurality of PSDs, at least one memory, a storage virtualization controller (SVC) comprising a central processing circuit (CPC), and a hardware computation device, comprising the steps of:
receiving a first I/O request from a host by the SVC for writing data into a first user data block in the PSDs of the PSD array, said first user data block being located on a first stripe having a first parity data block and a second parity data block; updating the second parity data block due to the first I/O request writing data into the first user data block, comprising the steps of:
using at least one memory for temporarily storing a first group of target data sets provided by a data source, wherein each of the first group of target data sets is of a length of a multiplication unit containing “a” XOR operation units, each of the XOR operation units being of a data length of “w” bits and being used for performing an XOR operation, and the multiplication unit being of a data length of “a” multiplying “w” bits and being used for performing a multiplication operation, wherein “a” and “w” are each a positive integer larger than one and “w” is independent of “a”;using the central processing circuit (CPC) to generate or to access at least one map table each associated with one value in a field, and storing the at least one map table in the at least one memory, wherein said at least one map table has a dimension of “a” by “a”;performing a multiplication operation on a first target data set of the first group of target data sets to obtain a first multiplication result, wherein said performing a multiplication operation is through using the hardware computation device to perform a plurality of XOR operations on the first target data set according to the at least one map table, wherein each of the plurality of XOR operations is performed on a part of the first target data set, said part of the first target data set being data in one of the “a” XOR operation units;storing the first multiplication result in the at least one memory;generating the second parity data block by obtaining a plurality of multiplication results by performing a plurality of multiplication operations each of which comprising performing a plurality of XOR operations on its corresponding target data set of the first group of target data sets; andstoring the generated second parity data set; and returning by the SVC a completion message of the first I/O request to the host.