发明名称 |
Apparatus and associated methods for parallelizing clustering and placement |
摘要 |
A system for parallelizing software in computer-aided design (CAD) software for circuit design includes a computer. The computer is configured to form or optimize a plurality of clusters in parallel. Each cluster in the plurality of clusters includes a set of nodes in a netlist in a design. The computer is configured to determine placements for blocks in a netlist in parallel, based on iterative improvement, partitioning, or analytic techniques. |
申请公布号 |
US9594859(B1) |
申请公布日期 |
2017.03.14 |
申请号 |
US200812040730 |
申请日期 |
2008.02.29 |
申请人 |
Altera Corporation |
发明人 |
Padalia Ketan;Ludwin Adrian;Fung Ryan;Betz Vaughn |
分类号 |
G06F17/50;G06F17/10 |
主分类号 |
G06F17/50 |
代理机构 |
|
代理人 |
Lyons Michael H. |
主权项 |
1. A system for parallelizing software in computer-aided design (CAD) software that designs a netlist describing a logic design for an integrated circuit, the system comprising:
computing equipment having a plurality of processors, wherein the plurality of processors form a plurality of groupings of logic elements that are identified by the netlist for the logic design in parallel, wherein each grouping in the plurality of groupings comprises a subset of the logic elements identified by the netlist, wherein logic elements within a first grouping in the plurality of groupings are placed in a first portion of the logic design, wherein logic elements within a second grouping in the plurality of groupings are concurrently placed in a second portion of the logic design that is different from the first portion of the logic design, wherein the computer-aided design software generates a bitstream based on the netlist, and wherein the integrated circuit implements the logic design when loaded with the bitstream. |
地址 |
San Jose CA US |