| 发明名称 | Memory device with variable trim parameters | ||
| 摘要 | A memory device comprising a memory array comprising a plurality of memory cells, two or more fuses coupled to the memory array, wherein each of the two or more fuses contains trim data for the memory array and a mode register for selecting one of the two or more fuses to be enabled. | ||
| 申请公布号 | US9594516(B2) | 申请公布日期 | 2017.03.14 |
| 申请号 | US201414181054 | 申请日期 | 2014.02.14 |
| 申请人 | Sony Semiconductor Solutions Corporation | 发明人 | Kitagawa Makoto;Kunihiro Takafumi;Otsuka Wataru;Tsushima Tomohito |
| 分类号 | G11C17/00;G06F3/06;G11C16/20;G11C17/16;G11C29/28;G11C11/16;G11C13/00;G11C17/18;G11C29/44 | 主分类号 | G11C17/00 |
| 代理机构 | Sheridan Ross P.C. | 代理人 | Sheridan Ross P.C. |
| 主权项 | 1. A memory device comprising: a memory array comprising a plurality of memory cells; two or more fuses coupled to the memory array, wherein each of the two or more fuses contains trim parameters for the memory array; a mode register for selecting one of the two or more fuses to be enabled; a lookup table, wherein the trim parameters are loaded into the lookup table; and a multiplexer, coupled to the two or more fuses, the mode register, and the lookup table, wherein the multiplexer is between the two or more fuses and the lookup table, and wherein the multiplexer outputs the trim parameters of the selected fuse to be enabled to the lookup table based on data stored in the mode register. | ||
| 地址 | Kanagawa JP | ||