发明名称 |
Transistor with performance boost by epitaxial layer |
摘要 |
The present disclosure relates to a transistor device. In some embodiments, the transistor device has an epitaxial layer disposed over a substrate. The epitaxial layer is arranged between a source region and a drain region separated along a first direction. Isolation structures are arranged on opposite sides of the epitaxial layer along a second direction, perpendicular to the first direction. A gate dielectric layer is disposed over the epitaxial layer, and a conductive gate electrode is disposed over the gate dielectric layer. The epitaxial layer overlying the substrate improves the surface roughness of the substrate, thereby improving transistor device performance. |
申请公布号 |
US9595589(B2) |
申请公布日期 |
2017.03.14 |
申请号 |
US201514980553 |
申请日期 |
2015.12.28 |
申请人 |
Taiwan Semiconductor Manufacturing Co., Ltd. |
发明人 |
Cheng Yu-Hung;Wu Cheng-Ta;Tu Yeur-Luen;Tsai Chia-Shiung;Lee Ru-Liang;Lin Tung-I;Chen Wei-Li |
分类号 |
H01L29/167;H01L29/207;H01L29/227;H01L31/0288;H01L29/423;H01L29/66;H01L21/02;H01L29/10;H01L27/146;H01L29/06;H01L29/16;H01L29/165 |
主分类号 |
H01L29/167 |
代理机构 |
Eschweiler & Associates, LLC |
代理人 |
Eschweiler & Associates, LLC |
主权项 |
1. A transistor device, comprising:
an epitaxial layer disposed over a substrate between a source region and a drain region separated along a first direction; isolation structures extending into the substrate on opposite sides of the epitaxial layer along a second direction, perpendicular to the first direction; a gate dielectric layer disposed over the epitaxial layer, wherein the gate dielectric layer comprises a non-planar layer that curves towards the substrate along outer edges of the gate dielectric layer; and a conductive gate electrode disposed over the gate dielectric layer. |
地址 |
Hsin-Chu TW |