发明名称 Voltage reference circuit
摘要 A voltage reference circuit is provided. In some embodiments, the voltage reference circuit includes a MOS stack that includes two or more MOS transistors having a substantially same voltage threshold. The voltage reference circuit is configured to generate, via the MOS stack, a first voltage waveform having a first temperature co-efficient and a second voltage waveform having a second temperature co-efficient. In some embodiments, the first temperature co-efficient has a polarity that is opposite a polarity of the second temperature co-efficient. In some embodiments, the first voltage waveform and the second voltage waveform are used to generate a reference voltage waveform, where the reference voltage waveform is substantially temperature independent due to the opposite polarities of the first temperature co-efficient and the second temperature co-efficient.
申请公布号 US9594390(B2) 申请公布日期 2017.03.14
申请号 US201414554353 申请日期 2014.11.26
申请人 Taiwan Semiconductor Manufacturing Company Limited 发明人 Kundu Amit;Horng Jaw-Juinn
分类号 G06F7/14;G05F3/02 主分类号 G06F7/14
代理机构 Cooper Legal Group, LLC 代理人 Cooper Legal Group, LLC
主权项 1. A voltage reference circuit, comprising: a metal-oxide semiconductor (MOS) stack comprising: a first MOS transistor having a first source/drain region, a second source/drain region, and a gate; anda second MOS transistor having a first source/drain region, a second source/drain region, and a gate, wherein: a first voltage waveform is generated at a first node to which the first source/drain region of the first MOS transistor, the gate of the first MOS transistor, and the gate of the second MOS transistor are coupled, anda second voltage waveform is generated at a second node coupled between the second source/drain region of the first MOS transistor and the first source/drain region of the second MOS transistor; and a summation circuit configured to merge the first voltage waveform with the second voltage waveform to generate a reference voltage waveform.
地址 Hsin-Chu TW