发明名称 |
METHOD FOR MANUFACTURING A TRANSISTOR HAVING A SHARP JUNCTION BY FORMING RAISED SOURCE-DRAIN REGIONS BEFORE FORMING GATE REGIONS AND CORRESPONDING TRANSISTOR PRODUCED BY SAID METHOD |
摘要 |
A transistor device is fabricated by growing an epitaxial layer of semiconductor material on a semiconductor layer and forming an opening extending through the epitaxial layer at a position where a gate is to be located. This opening provides, from the epitaxial layer, a source epitaxial region on one side of the opening and a drain epitaxial region on an opposite side of the opening. The source epitaxial region and a first portion of the semiconductor layer underlying the source epitaxial region are then converted into a transistor source region. Additionally, the drain epitaxial region and a second portion of the semiconductor layer underlying the drain epitaxial region are converted into a transistor drain region. A third portion of the semiconductor layer between the transistor source and drain regions forms a transistor channel region. A transistor gate electrode is then formed in the opening above the transistor channel region. |
申请公布号 |
US2017069661(A1) |
申请公布日期 |
2017.03.09 |
申请号 |
US201514887814 |
申请日期 |
2015.10.20 |
申请人 |
STMicroelectronics, Inc. |
发明人 |
Zhang John Hongguang |
分类号 |
H01L27/12;H01L29/06;H01L21/762;H01L21/84;H01L29/161;H01L29/20;H01L29/66;H01L29/08;H01L21/02 |
主分类号 |
H01L27/12 |
代理机构 |
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代理人 |
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主权项 |
1. A method, comprising:
growing an epitaxial layer of semiconductor material on a semiconductor layer; forming an opening extending through said epitaxial layer of semiconductor material at a position where a transistor gate is to be located to provide, from said epitaxial layer of semiconductor material, a source epitaxial region on one side of said opening and a drain epitaxial region on an opposite side of said opening; applying an anneal temperature to both the source epitaxial region and a first portion of the semiconductor layer underlying the source epitaxial region to convert the source epitaxial region and the first portion into a transistor source region; applying an anneal temperature to both the drain epitaxial region and a second portion of the semiconductor layer underlying the drain epitaxial region to convert the drain epitaxial region and the second portion into a transistor drain region; wherein a third portion of the semiconductor layer between the transistor source region and transistor drain region forms a transistor channel region; and forming a transistor gate electrode in said opening above the transistor channel region. |
地址 |
Coppell TX US |