发明名称 POWER MANAGEMENT INTERGRATED CIRCUIT, ELECTRONIC DEVICE, AND METHOD FOR CONTROLLING POWER MANAGEMENT INTERGRATED CIRCUIT
摘要 The present invention reduces power consumption of a device equipped with a central processing unit (CPU) and a power management integrated circuit (PMIC). The power management integrated circuit is equipped with a determination unit, a holding unit, a power supply unit, and a communication unit. The determination unit, upon determining the presence/absence of a recovery factor for recovering from an energy-saving mode, generates recovery factor information indicating the determination result. The holding unit holds the recovery factor information. Upon occurrence of the recovery factor, the power supply unit supplies power to a processing unit. When the processing unit is activated by the supplied power, the communication unit transmits the held recovery factor information to the processing unit.
申请公布号 WO2017038174(A1) 申请公布日期 2017.03.09
申请号 WO2016JP65883 申请日期 2016.05.30
申请人 SONY CORPORATION 发明人 MATSUKAWA, Tomohiro;KATAYAMA, Yasushi;SEKIYA, Akito
分类号 G06F1/32 主分类号 G06F1/32
代理机构 代理人
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