METHOD OF FORMING SEMICONDUCTOR DEVICE INCLUDING EDGE CHIP AND RELATED DEVICE

摘要

A method of forming a semiconductor device includes forming a molding layer and a supporter layer on a substrate including an etch stop layer, forming a mask layer on the supporter layer, forming a first edge blocking layer on the mask layer, forming a mask pattern by etching the mask layer, forming a hole, forming a lower electrode in the hole, forming a supporter mask layer on the supporter layer, forming a second edge blocking layer on the supporter mask layer, forming a supporter mask pattern by patterning the supporter mask layer, forming a supporter opening passing through the supporter layer, removing the molding layer, forming a capacitor dielectric layer and an upper electrode on the lower electrode, forming an interlayer insulating layer on the upper electrode, and planarizing the interlayer insulating layer. The hole passes through the supporter layer, the molding layer and the etch stop layer.

主权项

1. A method of forming a semiconductor device, comprising:
forming a molding layer and a supporter layer on a substrate including an etch slop layer,
the substrate including a main chip and an edge chip,the edge chip being nearer an edge of the substrate than the main chip,the main chip including a first cell region and a first peripheral region, andthe edge chip including a second cell region and a second peripheral region; forming a mask layer on the supporter layer; forming a first edge blocking layer on the mask layer, the first edge blocking layer being covering the second cell region and the second peripheral region; forming a mask pattern on the substrate, the forming the mask pattern including etching the mask layer; forming a hole passing through the supporter layer, the molding layer and the etch stop layer using the mask pattern as an etching mask, the hole being formed on the first cell region, and the hole not being formed on the first peripheral region, the second cell region, and the second peripheral region; forming a lower electrode in the hole; exposing an upper surface of the supporter layer such that upper ends of the supporter layer and the hole on the first cell region, an upper end of the supporter layer on the first peripheral region, an upper end of the supporter layer on the second cell region, and an upper end of the supporter layer on the second peripheral region are formed at substantially the same level; forming a supporter mask layer on the supporter layer; forming a second edge blocking layer on the supporter mask layer; patterning the supporter mask layer, the patterning the supporter mask layer including forming a supporter mask pattern; forming a supporter opening through the supporter layer; removing the molding layer; forming a capacitor dielectric layer on the lower electrode; forming an upper electrode on the capacitor dielectric layer; forming an interlayer insulating layer on the upper electrode; and planarizing the interlayer insulating layer.