发明名称 |
SEMICONDUCTOR DEVICE AND INFORMATION READING METHOD |
摘要 |
A semiconductor device including a memory device configured to take a plurality of resistance states that are distinguishable from one another; a bias application section configured to apply, in a bias application period, a bias signal to the memory device; and a determination section configured to determine a resistance state of the memory device on the basis of a detection signal, in which the detection signal is generated in the memory device to which the bias signal is applied. The bias application section sets a length of the bias application period in accordance with a resistance value of the memory device, when the resistance state determined by the determination section is predetermined one of the resistance states. |
申请公布号 |
US2017069376(A1) |
申请公布日期 |
2017.03.09 |
申请号 |
US201615356045 |
申请日期 |
2016.11.18 |
申请人 |
Sony Semicondudor Solutions Corporation |
发明人 |
Shiimoto Tsunenori |
分类号 |
G11C13/00;H01L27/24;H01L45/00 |
主分类号 |
G11C13/00 |
代理机构 |
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代理人 |
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主权项 |
1. A memory device, comprising:
a plurality of memory cells, each of the memory cells including a first electrode, a memory layer and a second electrode; a bias application section in electrical communication with the memory cells; and a determination section in electrical communication with the memory cells. |
地址 |
Kanagawa JP |