| 发明名称 |
Synchronising Devices Using Clock Signal Delay Comparison |
| 摘要 |
A circuit for estimating a time difference between a first signal and a second signal, the circuit comprising: a first signal line for receiving the first signal; a delay unit configured to receive the second signal and delay the second signal so as to provide a plurality of delayed versions of the second signal, each delayed version being delayed by a different amount of delay to the other delayed versions; a comparison unit configured to compare each of the delayed versions of the second signal with the first signal so as to identify which of the delayed versions of the second signal is the closest temporally matching signal to the first signal; and a difference estimator configured to estimate the time difference between the first and second signals in dependence on the identified delayed version. |
| 申请公布号 |
US2017070338(A1) |
申请公布日期 |
2017.03.09 |
| 申请号 |
US201615261652 |
申请日期 |
2016.09.09 |
| 申请人 |
Imagination Technologies Limited |
发明人 |
Giriyappa Ravichandra;Prasad Vinayak;Rosu Oana |
| 分类号 |
H04L7/033;H04L7/00 |
主分类号 |
H04L7/033 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A circuit for estimating a time difference between a first signal and a second signal, the circuit comprising:
a first signal line for receiving the first signal; a delay unit configured to receive the second signal and delay the second signal so as to provide a plurality of delayed versions of the second signal, each delayed version being delayed by a different amount of delay to the other delayed versions; a comparison unit configured to compare each of the delayed versions of the second signal with the first signal so as to identify which of the delayed versions of the second signal is the closest temporally matching signal to the first signal; and a difference estimator configured to estimate the time difference between the first and second signals in dependence on the identified delayed version. |
| 地址 |
Kings Langley GB |
