发明名称 SEMICONDUCTOR DEVICE, CHIP MODULE, AND SEMICONDUCTOR MODULE
摘要 Provided is a technology which is capable of inhibiting reduction in the effective area of wiring due to through holes, and which is capable of stably supplying power. In this semiconductor device (1), a surface-layer power supply path (40), which supplies power to a semiconductor chip (51p) via an inner-circumferential-side power supply terminal group (141g) and an outer-circumferential-side power supply terminal group (16g), is provided to a surface-layer wiring layer (31) of a main substrate (3) provided with a plurality of wiring layers (31, 32, 33, 39) and through holes (TH), said surface-layer wiring layer having a chip module (5M) mounted thereto. The surface-layer power supply path (40) is continuously formed so as to overlap the inner-circumferential-side power supply terminal group (141g) and the outer-circumferential-side power supply terminal group (16g) when viewed from an orthogonal direction (Z), and extend in a direction (Y) heading towards the outer circumferential side of the main substrate (3) from a position connected to the inner-circumferential-side power supply terminal group (141g).
申请公布号 WO2017038905(A1) 申请公布日期 2017.03.09
申请号 WO2016JP75578 申请日期 2016.08.31
申请人 AISIN AW CO., LTD. 发明人 NARUSE Takanobu
分类号 H01L23/12;H05K3/46 主分类号 H01L23/12
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