TRENCH GATE TRENCH FIELD PLATE VERTICAL MOSFET

摘要

A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define vertical drift regions of the transistor, so that each vertical drift region is bounded on at least two opposite sides by the deep trench structures. The deep trench structures are spaced so as to form RESURF regions for the drift region. Trench gates are formed in trenches in the substrate over the vertical drift regions. The body regions are located in the substrate over the vertical drift regions.

主权项

1. A vertical drain extended transistor formed in a semiconductor substrate, comprising:
a first trench structure comprising:
a first trench;a first insulating liner formed on sides and bottom of said first trench; anda first conductive material operable to have an electrical potential and formed on said first insulating liner; a second trench structure comprising:
a second trench;a second insulating liner formed on sides and bottom of said second trench; anda second conductive material operable to have said electrical potential and formed on said second insulating liner; a gate structure comprising:
a gate trench;a gate dielectric layer formed on sides and bottom of said gate trench; anda trench gate formed on said gate dielectric layer in said gate trench, wherein said gate structure is spaced apart from said first trench structure and said second trench structure; a vertically oriented drift region of a first conductivity type, contacting to said gate dielectric layer at said bottom of said gate trench, and extending deeper than said gate structure; a first body region of a second conductivity type over said vertically extended drift region, contacting said gate dielectric layer at one side of said gate trench; a second body region of said second conductivity type over said vertically extended drift region, contacting said gate dielectric layer at an opposite side of said gate trench; a first source region of said first conductivity type over said first body region, contacting to said gate dielectric layer at said one side of said gate trench and extending to a surface of said semiconductor substrate between said first trench structure and said gate structure; and a second source region of said first conductivity type over said second body region, contacting to said gate dielectric layer at said opposite side of said gate trench and extending to said surface of said semiconductor substrate between said second trench structure and said gate structure, wherein said first trench structure and said second trench structure are deeper than a top of said vertically oriented drift region.