发明名称 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE
摘要 First to third insulators are successively formed in this order over a first conductor over a semiconductor substrate; a hard mask with a first opening is formed thereover; a resist mask with a second opening is formed thereover; a third opening is formed in the third insulator; a fourth opening is formed in the second insulator; the resist mask is removed; a fifth opening is formed in the first to third insulators; a second conductor is formed to cover an inner wall and a bottom surface of the fifth opening; a third conductor is formed thereover; polishing treatment is performed so that the hard mask is removed, and that levels of top surfaces of the second and third conductors and the third insulator are substantially equal to each other; and an oxide semiconductor is formed thereover. The second insulator is less permeable to hydrogen than the first and third insulators, the second conductor is less permeable to hydrogen than the third conductor.
申请公布号 US2017125450(A1) 申请公布日期 2017.05.04
申请号 US201615332006 申请日期 2016.10.24
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 HODO Ryota;KURATA Motomu;SASAGAWA Shinya;OKAMOTO Satoru;YAMAZAKI Shunpei
分类号 H01L27/12;H01L29/66;H01L21/02;H01L21/467;H01L21/463;H01L21/768;H01L29/786;H01L23/535 主分类号 H01L27/12
代理机构 代理人
主权项 1. A method for manufacturing a semiconductor device, comprising the steps of: forming a first conductor over a semiconductor substrate; forming a first insulator over the first conductor; forming a second insulator over the first insulator; forming a third insulator over the second insulator; forming a hard mask with a first opening over the third insulator; forming a resist mask with a second opening over the hard mask; etching the third insulator using the resist mask to form a third opening in the third insulator; etching the second insulator using the resist mask to form a fourth opening in the second insulator; removing the resist mask; etching the first to third insulators using the hard mask to form a fifth opening in the first to third insulators; forming a second conductor to cover an inner wall and a bottom surface of the fifth opening; forming a third conductor over the second conductor to fill the fifth opening; performing polishing treatment on the hard mask, the second conductor, and the third conductor so that the hard mask is removed, and that levels of top surfaces of the second conductor, the third conductor, and the third insulator are substantially equal to each other; and forming an oxide semiconductor over the second conductor and the third conductor, wherein the second insulator is in contact with the second conductor at an edge of the fifth opening, wherein the second insulator is less permeable to hydrogen than the first insulator, and wherein the second conductor is less permeable to hydrogen than the third conductor.
地址 Atsugi-shi JP