Split Gate Non-volatile Flash Memory Cell Having Metal Gates And Method Of Making Same

摘要

A memory device including a silicon substrate having a planar upper surface in a memory cell area and an upwardly extending silicon fin in a logic device area. The silicon fin includes side surfaces extending up and terminating at a top surface. The logic device includes spaced apart source and drain regions with a channel region extending there between (along the top surface and the side surfaces), and a conductive logic gate disposed over the top surface and laterally adjacent to the side surfaces. The memory cell includes spaced apart source and drain regions with a second channel region extending there between, a conductive floating gate disposed over one portion of the second channel region, a conductive word line gate disposed over another portion of the second channel region, a conductive control gate disposed over the floating gate, and a conductive erase gate disposed over the source region.

主权项

1. A memory device, comprising:
a silicon substrate having an upper surface, wherein:
the upper surface is planar in a memory cell area of the silicon substrate,the upper surface includes an upwardly extending silicon fin in a logic device area of the silicon substrate, andthe silicon fin includes a pair of side surfaces extending up and terminating at a top surface; a logic device in the logic device area, comprising:
spaced apart first source and first drain regions formed in the silicon substrate with a first channel region of the silicon substrate extending there between, wherein the first channel region extends along the top surface and the pair of side surfaces, anda conductive logic gate disposed over and insulated from the top surface, and disposed laterally adjacent to and insulated from the pair of side surfaces; a memory cell in the memory cell area, comprising:
spaced apart second source and second drain regions formed in the silicon substrate with a second channel region of the silicon substrate extending there between,a conductive floating gate disposed over and insulated from a first portion of the second channel region that is adjacent the second source region,a conductive word line gate disposed over and insulated from a second portion of the second channel region that is adjacent the second drain region,a conductive control gate disposed over and insulated from the floating gate, anda conductive erase gate disposed over and insulated from the second source region.