SEMICONDUCTOR DEVICE HAVING CHIP ID GENERATION CIRCUIT

摘要

Provided is a semiconductor device including chip identification (ID) generation circuits. The semiconductor device may be a multi-chip package including a plurality of memory chips, and each of the memory chips includes a chip ID generation circuit configured to selectively modify a chip ID of a corresponding memory chip. The chip ID generation circuit determines the chip ID of the memory chip by testing the chip ID of the memory chip by using a mode register, and selectively programs the chip ID of the memory chip by using at least two fuse sets. The chip ID generation circuit may block an output of the chip ID of the memory chip when the memory chip is determined as a defective chip or is selected to stop its use.

主权项

1. A semiconductor device comprising a plurality of chips, wherein each of the chips comprises:
a core area including a memory cell array; an interface area configured to provide an external interface; a chip ID generation circuit configured to selectively modify a chip ID of a core area of a corresponding chip; and a master/slave classification circuit configured to identify whether an interface area of the corresponding chip is a master chip or a slave chip.