发明名称 |
SELF-ORGANIZED CRITICAL CMOS CIRCUITS AND METHODS FOR COMPUTATION AND INFORMATION PROCESSING |
摘要 |
A circuit that makes use of chaos or self-organized criticality to generate a matrix of bits for computation and information processing. The example embodiment utilizes CMOS circuitry and can solve optimization problems. A plurality of unit cells includes multiple transistors in a lattice formation that set voltages as state variables to other transistor cells. Adjustable bifurcation parameters are utilized to bring the chaotic circuit in and out of the chaotic regime. A processing unit with software are utilized for implanting a problem of interest into the chaotic circuit, while data latches or analog to digital converters provide for reading out the voltages from the chaotic circuit. |
申请公布号 |
US2017124477(A1) |
申请公布日期 |
2017.05.04 |
申请号 |
US201615346538 |
申请日期 |
2016.11.08 |
申请人 |
THE REGENTS OF THE UNIVERSITY OF CALIFORNIA |
发明人 |
Wang Kang L.;Chang Hao-Yuan |
分类号 |
G06N7/08;G06N7/00 |
主分类号 |
G06N7/08 |
代理机构 |
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代理人 |
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主权项 |
1. An apparatus for solving optimization problems, comprising:
(a) a circuit lattice having a plurality of unit cells interconnected by a matrix of transmission gates; (b) wherein each unit cell is configured for setting a voltage as a state variable in the circuit lattice for each unit cell position; and (c) wherein the transmissive mode of each transmission gate is configured for being set in response to receiving a control signal to establish the transmissive mode of said transmission gate; (d) a controller configured for outputting bifurcation control signals to change operating characteristics of at least a portion of the unit cells, and for outputting coupling strength control signals for changing transmission characteristics of said transmission gates when implanting an objective function in said circuit lattice; and (e) a voltage registration circuit configured for registering state variable voltages in said circuit matrix and outputting these state variable voltages as digital signals to said controller; (f) wherein said controller is configured for implanting a problem of interest into the circuit matrix, and for controlling bifurcation to drive said matrix circuit between chaos, self-organized critical, or Markovian regimes by modifying bifurcation parameters, until a desired solution is obtained. |
地址 |
Oakland CA US |