发明名称 |
DUAL SILICIDE LINER FLOW FOR ENABLING LOW CONTACT RESISTANCE |
摘要 |
A method for fabricating a semiconductor device includes depositing a sacrificial liner in self-aligned contact openings in first and second regions. The openings are filled with a sacrificial material. The second region is blocked with a first mask to remove the sacrificial material from the first region. The first mask is removed from the second region, and the sacrificial liner is removed from the first region. A first liner is formed in the openings of the first region, and first contacts are formed in the first region on the first liner. The first region is blocked with a second mask to remove the sacrificial material from the second region. The second mask is removed from the first region, and the sacrificial liner is removed from the second region. A second liner is formed in the openings of the second region, and second contacts are formed in the second region. |
申请公布号 |
US2017125338(A1) |
申请公布日期 |
2017.05.04 |
申请号 |
US201615157803 |
申请日期 |
2016.05.18 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
Adusumilli Praneet;Basker Veeraraghavan S.;Liu Zuoguang;Yamashita Tenko;Yeh Chun-Chen |
分类号 |
H01L23/525;H01L23/532;H01L27/092 |
主分类号 |
H01L23/525 |
代理机构 |
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代理人 |
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主权项 |
1. A semiconductor device, comprising:
a first region including n-type field effect transistors (NFETs); a second region including p-type field effect transistors (PFETs); a first liner formed in the self-aligned contact openings of the NFETs; first contacts formed in the self-aligned contact openings of the NFETs on the first liner; a second liner formed in the self-aligned contact openings of the PFETs; and second contacts formed in the self-aligned contact openings of the PFETs on the second liner, wherein the self-aligned contact openings include only one liner in the first region and only one liner in the second region and the first liner and the second liner include different materials. |
地址 |
Armonk NY US |