SEMICONDUCTOR DEVICE, MEMORY DEVICE, ELECTRONIC DEVICE, OR METHOD FOR DRIVING THE SEMICONDUCTOR DEVICE

摘要

A semiconductor device with an improved arithmetic processing speed and a decreased circuit size, and its driving method are provided. In the semiconductor device, a first terminal of a first transistor and a gate of a second transistor are electrically connected to a first terminal of a capacitor, and a control circuit is electrically connected to a second terminal of the capacitor. The control circuit supplies a first potential to the second terminal of the capacitor, in other words, adds a value corresponding to the first potential to the value of first data previously retained in the gate of the second transistor in order to obtain second data. In the second transistor, the second data, specifically, a third potential commensurate with the potential of the gate will be output from a second terminal when a second potential is supplied to a first terminal.

主权项

1. A driving method of a semiconductor device,
the semiconductor device comprising:
a first transistor;a second transistor;a capacitor; anda control circuit, wherein a first terminal of the first transistor is electrically connected to a first terminal of the capacitor, wherein a gate of the second transistor is electrically connected to the first terminal of the capacitor, wherein the control circuit is electrically connected to a second terminal of the capacitor, wherein first data of m bits is retained in the gate of the second transistor, wherein m is an integer of 1 or more, wherein the first data has a value of i, wherein i is an integer of 0 to 2m−2, and wherein j is an integer of 1 to 2m−1−i, the driving method comprising the steps of:
supplying a first potential from the control circuit to the second terminal of the capacitor in order to add a value of j that corresponds to the first potential to the value of the first data, so that data retained in the gate of the second transistor is changed from the first data to second data; andsupplying a second potential to a first terminal of the second transistor in order to output a third potential in accordance with a potential of the gate of the second transistor from the second terminal of the second transistor after supplying the first potential, so that the second data is outputted, wherein, when the second potential is supplied, the second data is retained in the potential of the gate of the second transistor.