SERIAL I/O USING JTAG TCK AND TMS SIGNALS

摘要

The present disclosure describes a novel method and apparatus of using the JTAG TAP's TMS and TCK terminals as a general purpose serial Input/Output (I/O) bus. According to the present disclosure, the TAP's TMS terminal is used as a clock signal and the TCK terminal is used as a bidirectional data signal to allow serial communication to occur between; (1) an IC and an external controller, (2) between a first and second IC, or (3) between a first and second core circuit within an IC.

主权项

1. An integrated circuit comprising:
(a) a TDI lead, a TDO lead, a TMS lead, and a TCK lead; (b) test access port circuitry having a TDI input coupled to the TDI lead, a TDO output coupled to the TDO lead, a TMS input coupled to the TMS lead, and a TCK input coupled to the TCK lead, the test access port circuitry having serial I/O communication control signal outputs; and (c) serial I/O communication circuitry having control inputs coupled to the serial I/O communication control signal outputs, having a TMS input coupled to the TMS lead, and being free of the TDI lead and the TDO lead.