MULTI-PROCESSOR NON-VOLATILE MEMORY SYSTEM HAVING A LOCKLESS FLOW DATA PATH

摘要

A system and method is disclosed for managing a non-volatile memory system having a multi-processor controller. The controller may be configured with a plurality of processors and a shared data queue in a cyclic data buffer. Each of the plurality of processors may manage a separate pointer pointing to a different entry of the shared data queue and multiple ones of the processors may concurrently access or update entries in the shared data queue.

主权项

1. A method for managing operations in a non-volatile memory system having a controller with a plurality of processors and a data path queue shared by the plurality of different processors, the method comprising:
a first processor of the plurality of processors in the controller accessing data at a first entry location of the shared data path queue; the first processor updating a first pointer to point to a next entry location adjacent to the first entry location in the shared data path queue after accessing the data at the first entry location; a second processor of the plurality of processors in the controller accessing data in a different entry location in the shared data path queue at least partially concurrently with the first processor accessing the data at the first entry location; when the first pointer is not pointing to a second next entry location in the shared data path queue immediately adjacent the different entry, the second processor updating a second pointer to point to the second next entry location; and when the first pointer is pointing to the second next entry location in the data path queue, the second processor waiting until the first pointer moves away from the second next data entry before updating the second pointer to point to the second next entry.