| 摘要 |
In an example, the present invention includes an integrated system on chip device. The device is configured on a single silicon substrate member. The device has a data input/output interface provided on the substrate member and configured for a predefined data rate and protocol. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The input/output block comprises a SerDes block, a CDR block, a compensation block, and an equalizer block. In an example, the SerDes block is configured to convert a first data stream of N into a second data stream of M such that each of the first data stream having a first predefined data rate at a first clock rate and each of the second data stream having a second predefined data rate at a second clock rate. The device has a driver module provided on the substrate member and coupled to the signal processing block. In an example, the device has a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device. |
| 主权项 |
1. A monolithically integrated system-on-chip device configured for a multi-rate and selected format of data communication, the device comprising:
a single silicon substrate member; a data input/output interface provided on the substrate member and configured for a predefined data rate and protocol; an input/output block provided on the substrate member and coupled of the data input/output interface, the input/output block comprising a SerDes block, a CDR block, a compensation block, and an equalizer block, the SerDes block being configured to convert a first data stream of N into a second data stream of M, each of the first data stream having a first predefined data rate at a first clock rate and each of the second data stream having a second predefined data rate at a second clock rate; a signal processing block provided on the substrate member and coupled to the input/output block, the signal processing block configured to the input/output block using a bi-direction bus in an intermediary protocol; a driver module provided on the substrate member and coupled to the signal processing block, the driver module coupled to the signal processing blocking using a uni-directional multi-lane bus; a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device, the driver interface being configured to transmit output data in either an amplitude modulation format or a combination of phase/amplitude modulation format or a phase modulation format; a receiver module comprising a TIA block provided on the substrate member and to be coupled to the silicon photonics device using predefined modulation format, and configured to the signal processing block to communicate information to the input/output block for transmission through the data input/output interface; a laser coupled to the silicon photonics device; a communication block provided on the substrate member and operably coupled to the input/output block, the signal processing block, the driver block, and the receiver block; a communication interface coupled to the communication block; and a control block provided on the substrate member and coupled to the communication block. |
