SEMICONDUCTOR DEVICE AND FABRICATION METHOD FOR FORMING THE SAME

摘要

The present disclosure provides a fabrication method for forming a semiconductor device, including: forming a substrate, the substrate including first fins, second fins, and a first trench located in the substrate between a first fin and an adjacent fin; forming a first mask layer on the substrate, the first fins, and the second fins; and removing portions of the first mask layer neighboring a first trench to expose a portion of a top surface of a first fin and a portion of a top surface of the adjacent second fin to form a first opening, a portion of the top surface of the first fin covered by a remaining portion of the first mask layer being a first fin device region, a portion of the top surface of the second fin covered by a remaining portion of the first mask layer being a second fin device region.

主权项

1. A fabrication method for forming a semiconductor device, comprising:
forming a substrate, the substrate including first fins, second fins, and a first trench located in the substrate between a first fin and an adjacent fin, a first fin being parallel to an adjacent second fin; forming a first mask layer on the substrate, the first fins, and the second fins; removing portions of the first mask layer neighboring a first trench to expose a portion of a top surface of a first fin and a portion of a top surface of the adjacent second fin to form a first opening, a portion of the top surface of the first fin covered by a remaining portion of the first mask layer being a first fin device region, a portion of the top surface of the second fin covered by a remaining portion of the first mask layer being a second fin device region; forming first insulating structures, a first insulating structure filling a first trench and a corresponding first opening, a first insulating structure covering a portion of the top surface of a first fin and a portion of the top surface of the adjacent second fin; forming a dummy gate structure on each first insulating structure, and a gate structure on each of the first fin device regions and the second fin device regions; and forming a stress layer in a first fin device region between a dummy gate structure and a gate structure and forming a stress layer in a second fin device region between a dummy gate structure and a gate structure.