发明名称 Method for checking a hardware-configurable logic circuit for faults
摘要 A method is described for checking a hardware-configurable logic circuit including circuit areas and including a configuration memory having different subareas for faults, a respective configuration of hardware elements of one of the circuit areas being defined by configuration data stored in an associated subarea of the configuration memory, and when at least one checking requirement in regard to an output signal which is provided by the hardware-configurable logic circuit is met, a fault check of the configuration data being carried out only in those subareas of the configuration memory of the hardware-configurable logic circuit which are involved in generating the output signal.
申请公布号 US9639653(B2) 申请公布日期 2017.05.02
申请号 US201414562124 申请日期 2014.12.05
申请人 ROBERT BOSCH GMBH 发明人 Frischke Michael
分类号 G06F17/50;G06F11/00;G01R31/3185;G11C29/04 主分类号 G06F17/50
代理机构 代理人 Messina Gerard
主权项 1. A method that is performed by a processing unit executing computer code stored in a non-transitory storage medium, the method being for checking for faults in a hardware-configurable logic circuit that includes circuit areas and a configuration memory having different subareas, a respective configuration of hardware elements of one of the circuit areas being defined by configuration data stored in an associated subarea of the configuration memory, the method comprising: when a result of at least one checking requirement that is performed on an output signal which is provided by the hardware-configurable logic circuit is met, carrying out a fault check of the configuration data only in those subareas of the configuration memory of the hardware-configurable logic circuit that are involved in generating the output signal.
地址 Stuttgart DE