发明名称 |
Drive circuit |
摘要 |
As one embodiment a drive circuit is disclosed. When a three-value signal including a value representing zero is input, the drive circuit outputs two two-value signals that drive two drive elements such that the difference between values representing the two two-value signals corresponds to a value representing the input three-value signal. When the value of the input three-value signal represents zero, output signals are determined in accordance with the input history of the three-value signal. The drive circuit may also be provided with a memory that records a flag value that is reversed in accordance with the input history of the input three-value signal, and the combination of the output two two-value signals being determined in accordance with the flag. |
申请公布号 |
US9641931(B2) |
申请公布日期 |
2017.05.02 |
申请号 |
US201414178656 |
申请日期 |
2014.02.12 |
申请人 |
Trigence Semiconductor, Inc. |
发明人 |
Yasuda Akira;Okamura Jun-ichi |
分类号 |
H04R3/00;H04R1/00;H03M7/14;H03M7/16;H03F3/217 |
主分类号 |
H04R3/00 |
代理机构 |
Typha IP LLC |
代理人 |
Typha IP LLC |
主权项 |
1. A drive circuit to which a three-value signal including a value representing 0 is input, and which outputs two two-value signals for driving two drive elements such that a difference between the values representing the two two-value signals corresponds to a value representing the three-value signal, which is input,
the drive circuit is connected to a logic circuit being input the three-value signal and a memory storing a flag value of the first flag determined based on the three-value signal input to the logic circuit, the drive circuit determining a combination of the two two-value signals, which are output, according to the flag value of the first flag stored in the memory and a value of the three-value signal, which is input to the logic circuit, in the case where the value of the three-value signal represents 0. |
地址 |
Tokyo JP |