Switching power supply device

摘要

A switching power supply device includes a switching output circuit, an error amplifier, a slope voltage generating circuit, a PWM comparator, a logic circuit, a switch driving circuit, and a reverse current detection circuit. The slope voltage generating circuit increases a slope voltage from a reset level with a gradient corresponding to an input voltage during an on period of the output transistor, and maintains the slope voltage at an offset level corresponding not to the reset level but to an output voltage during an off period of the output transistor.

主权项

1. A switching power supply device comprising:
a switching output circuit arranged to drive an output inductor by turning on and off an output transistor and a synchronous rectifying transistor, so as to generate an output voltage from an input voltage; an error amplifier arranged to generate an error voltage corresponding to a difference between a predetermined reference voltage and the output voltage or a feedback voltage in proportion to the output voltage; a slope voltage generating circuit arranged to generate a slope voltage; a pulse width modulation (PWM) comparator arranged to compare the error voltage with the slope voltage so as to generate a comparison signal; a logic circuit arranged to receive an input of the comparison signal so as to generate a pulse width modulation signal; a switch driving circuit arranged to receive an input of the pulse width modulation signal so as to generate a drive signal of the switching output circuit, and a reverse current detection circuit arranged to detect a reverse current of an inductor current that flows in the output inductor so as to forcibly turn off the synchronous rectifying transistor, wherein the slope voltage generating circuit increases the slope voltage from a reset level with a gradient corresponding to the input voltage during an on period of the output transistor, while it maintains the slope voltage not at the reset level but at an offset level corresponding to the output voltage during at least a part of an off period of the output transistor.