Through silicon via keep out zone formation method and system

摘要

Keep out zones (KOZ) are formed for a through silicon via (TSV). A device can be placed outside a first KOZ of a TSV determined by a first performance threshold so that a stress impact caused by the TSV to the device is less than a first performance threshold while the first KOZ contains only those points at which a stress impact caused by the TSV is larger than or equal to the first performance threshold. A second KOZ for the TSV can be similarly formed by a second performance threshold. A plurality of TSVs can be placed in a direction that the KOZ of the TSV has smallest radius to a center of the TSV, which may be in a crystal orientation [010] or [100]. A plurality of TSV stress plug can be formed at the boundary of the overall KOZ of the plurality of TSVs.

主权项

1. A method of forming an integrated circuit (IC), the method comprising:
forming a plurality of active devices; forming a plurality of through silicon vias (TSVs) arranged along a linear axis, wherein each TSV has a respective keep out zone (KOZ), a union of the respective KOZs defining an overall KOZ for the plurality of TSVs; and forming a first set of TSV stress plugs comprising a pair of TSV stress plugs at a first end region of an overall KOZ of the plurality of TSVs, the first set of TSV stress plugs reducing stress caused by the plurality of TSVs, the first set of TSV stress plugs being spaced equidistant from the linear axis, no TSV stress plugs being along the linear axis at the first end region.