发明名称 Anti-fuse of semiconductor device, semiconductor module and system each including the semiconductor device, and method for forming the anti-fuse
摘要 An anti-fuse based on a Field Nitride Trap (FNT) is disclosed. The anti-fuse includes a first active pillar including a first junction, a second active pillar including a second junction, a selection line buried between the first active pillar and the second active pillar, and a trap layer for electrically coupling the first junction to the second junction by trapping minority carriers according to individual voltages applied to the first junction, the second junction and the selection line. As a result, the fuse can be highly integrated through the above-mentioned structure, and programming of the fuse can be easily achieved.
申请公布号 US9640541(B2) 申请公布日期 2017.05.02
申请号 US201615131982 申请日期 2016.04.18
申请人 SK HYNIX INC. 发明人 Lee Eun Sung
分类号 H01L27/112;H01L21/768;H01L23/525;H01L27/108;G11C17/16;G11C29/00 主分类号 H01L27/112
代理机构 代理人
主权项 1. A method for forming an anti-fuse of a semiconductor device, the method comprising: forming a first active region and a second active region by etching a semiconductor substrate; forming a trap layer over sidewalls of the first and second active regions and a bottom of a space between the first active region and the second active region; forming a device isolation film filling a space around the first and second active regions to define the first and second active regions; forming a trench by etching a portion of the device isolation film disposed between the first active region and the second active region; forming a selection line by filling a lower part of the trench with a conductive material; and forming a first signal line and a second signal line, which are located perpendicular to the selection line and coupled to the first active region and the second active region, respectively, wherein the trap layer includes minority carriers trapped therein by: applying first and second voltages to the first signal line and the second signal line, respectively, the first voltage being different from the second voltage; andapplying a third voltage to the selection line, the third voltage being equal to or less than the first voltage applied to the first signal line.
地址 Icheon KR