发明名称 |
Methods and apparatuses for generating random numbers based on bit cell settling time |
摘要 |
One feature pertains to a true random number generator that utilizes the settling time of a bit cell as an entropy source to generate random digital output values. The bit cell may be a static random access memory bit cell. The bit cell's settling time may be converted into a digital output using an analog to digital converter. A plurality of bit cells may serially couple to one another in a ring formation. The bit cell ring can then be enabled such that each bit cell of the plurality of bit cells achieves a settling value that activates the subsequent bit cell in the ring causing it to in turn reach a settling value, and so on. An output node of one of the bit cells in the ring can then be sampled using a flip-flop to generate a continuous stream of random bits. |
申请公布号 |
US9640247(B2) |
申请公布日期 |
2017.05.02 |
申请号 |
US201514597146 |
申请日期 |
2015.01.14 |
申请人 |
QUALCOMM Incorporated |
发明人 |
Chen Nan;Zhang Junmou;Chen Min |
分类号 |
G06F7/58;G11C11/417;G11C7/10 |
主分类号 |
G06F7/58 |
代理机构 |
Loza & Loza, LLP |
代理人 |
Loza & Loza, LLP |
主权项 |
1. A random number generator comprising:
a plurality of bit cells coupled together such that an output of each of the plurality of bit cells is coupled to an input of a successive bit cell of the plurality of bit cells, each bit cell of the plurality of bit cells having a random settling time; and an analog to digital converter (ADC) configured to receive the random settling time of a bit cell of the plurality of bit cells and generate a random digital output value based on the random settling time received. |
地址 |
San Diego CA US |