发明名称 Memory circuit and layout structure of a memory circuit
摘要 A memory circuit includes a transistor, a signal line and a plurality of information lines. The transistor includes a first electrode, a second electrode and a control electrode. The transistor is included in a memory cell. The signal line is connected to the first electrode of the transistor. The voltage on the signal line is programmable. At most one of the information lines is connected to the second electrode of the transistor via a contact. Information stored in the memory cell is coded according to the voltage programmed on the signal line and an option of which information line the contact should connect to the second electrode of the transistor.
申请公布号 US9640229(B2) 申请公布日期 2017.05.02
申请号 US201514692057 申请日期 2015.04.21
申请人 MEDIATEK INC. 发明人 Wang Dao-Ping;Wang Chia-Wei
分类号 G11C5/06;G11C7/06;G11C7/00;G11C16/12;G11C17/12;G11C17/14;G11C11/56;G11C5/14 主分类号 G11C5/06
代理机构 McClure, Qualey & Rodack, LLP 代理人 McClure, Qualey & Rodack, LLP
主权项 1. A memory circuit, comprising: a transistor, comprising a first electrode, a second electrode and a control electrode, wherein the transistor is comprised in a memory cell; a signal line, connected to the first electrode of the transistor, wherein a voltage on the signal line is programmable; and a plurality of information lines, wherein at most one of the information lines is connected to the second electrode of the transistor via a contact, wherein information stored in the memory cell is coded according to the voltage programmed on the signal line and an option of which information line the contact should connect to the second electrode of the transistor.
地址 Hsin-Chu TW
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