Synchronized transfer of data and corresponding error correction data

摘要

Memory devices having a first plurality of data buffers coupled to sense circuitry, a second plurality of data buffers coupled to sense circuitry, and an error correction controller coupled to the first and second plurality of data buffers and configured to synchronize data from the first and second plurality of data buffers prior to transmitting the data, as well as systems containing such memory devices.

主权项

1. A memory device comprising:
a first memory array configured to store data; a second memory array configured to store error correction data; first sense circuitry coupled to the first memory array; second sense circuitry coupled to the second memory array; a first plurality of data buffers coupled to the first sense circuitry; a second plurality of data buffers coupled to the second sense circuitry; and a controller coupled to the first and second plurality of data buffers and configured to synchronize data from the first plurality of data buffers resulting from a read operation with error correction data from the second plurality of data buffers resulting from the read operation prior to transmitting the data and the error correction data.