发明名称 Calibration techniques for SAR ADCs with on-chip reservoir capacitors
摘要 When reservoir capacitors are moved on-chip for individual bit decisions, a successive approximation register analog-to-digital converter (SAR ADC) has an addition source of error which can significantly affect the performance of the SAR ADC. Calibration techniques can be applied to measure and correct for such error in an SAR ADC using decide-and-set switching. Specifically, a calibration technique can expose the effective bit weight of each bit under test using a plurality of special input voltages and storing a calibration word for each bit under test to correct for the error. Such a calibration technique can lessen the need to store a calibration word for each possible output word to correct the additional source of error. Furthermore, another calibration technique can expose the effective bit weight of each bit under test without having to generate the plurality of special input voltages.
申请公布号 US9641189(B2) 申请公布日期 2017.05.02
申请号 US201514747071 申请日期 2015.06.23
申请人 ANALOG DEVICES, INC. 发明人 Maddox Mark D.;Coln Michael;Carreau Gary R.;Chen Baozhen
分类号 H03M1/12;H03M1/10;H03M1/46 主分类号 H03M1/12
代理机构 Patent Capital Group 代理人 Patent Capital Group
主权项 1. A method for measuring effective bit weights for calibrating a successive-approximation register analog-to-digital converter (SAR ADC) for digitizing an analog input of the SAR ADC, the method comprising: measuring a first effective bit weight associated with first circuitry for generating a first bit of the SAR ADC, wherein during measuring of the first effective bit weight, first bit capacitors of the first circuitry sample the analog input of the SAR ADC and subsequently draw a first reference charge from a first on-chip reservoir capacitor of the first circuitry; and after the first effective bit weight is measured, measuring a second effective bit weight associated with second circuitry for generating a second bit of the SAR ADC, wherein the second effective bit weight is isolated from the first effective bit weight and during the measuring of the second effective bit weight, second bit capacitors associated with the second bit of the second circuitry and other bit capacitors associated with bits less significant than the second bit sample the analog input of the SAR ADC against a common mode voltage and subsequently the second bit capacitors draw a second reference charge from a second on-chip reservoir capacitor of the second circuitry.
地址 Norwood MA US