Device and method for communicating between cores

摘要

A device and method for communicating between cores are provided. The device comprises: a postbox component, configured to store a message sent from a message sending core to a message receiving core and notify the message receiving core to read the message; and a bus adapter component, connected between the postbox component and the message receiving core and the message sending core which communicate with each other and configured to provide read/write interfaces of the postbox component and the message receiving core and the message sending core. By means of the disclosure, the problems that the device and method for communicating between cores with high complexity, poor timeliness and poor expandability during multi-core application in the related art are solved, thereby achieving the effects of reducing the communication between cores complexity significantly, reducing communication time delay and having excellent expandability and scalability.

主权项

1. A device for communicating between cores, comprising:
a postbox component, performed by the hardware processor, configured to store a message sent from a message sending core to a message receiving core and notify the message receiving core to read the message; and a bus adapter, connected between the postbox component and the message receiving core and the message sending core which communicate with each other and configured to provide read/write interfaces of the postbox component and the message receiving core and the message sending core; wherein the postbox component comprises: a bus interface element, configured to achieve a mutual exclusion of a read/write message by multiplexing a bus error feedback register; wherein the bus interface element comprises: a first mutual exclusion element, configured to achieve a function of a mutual exclusion lock by multiplexing the bus error feedback register, so as to achieve a mutual exclusion of a plurality of message sending cores writing messages to the postbox component; and/or a second mutual exclusion element, configured to achieve a function of a mutual exclusion lock by multiplexing the bus error feedback register, so as to achieve a mutual exclusion of a message sending core writing a message to the postbox component and a message receiving core reading a message from the postbox component; a triggering subelement, configured to trigger a state of the bus error feedback register to change after the message sending core writes a message to the postbox component, or the message receiving core reads a message from the postbox component, the postbox component sends a first response message to the message sending core after the message sending core writes a message to the postbox component, wherein the message sending core determines that the message sending core successfully writes the message to the postbox component according to the first response message; and/or the postbox component sends a second response message to the message receiving core after the message receiving core reads a message from the postbox component, wherein the message receiving core determines that the message receiving core successfully reads the message according to the second response message.